1. Field of the invention
This invention relates to a chip package for mounting, for example, a semiconductor chip of ultra-high frequency which can operates within a range of so-called ultra-high actuating frequency, such as 3 GHz to 50 GHz.
2. Description of the Related Art
In the prior art, there is known a package for mounting a chip, for example, a semiconductor chip, shown in FIGS. 21 through 23. FIG. 21 is a partially broken plan view for illustrating such a known package 1. FIGS. 22 and 23 are front elevational views, partially shown in vertical cross-sections, for illustrating the packages. The construction of this package will now be briefly described. The package 1 generally comprises: a metal substrate 4 (as shown in FIG. 22) or a lower insulation layer 6a made of, for example, ceramic (as shown in FIG. 23) defining a chip mount surface 2; a bonding layer 3 formed on the chip mount surface 2 for mounting thereon a chip, such as, a semiconductor chip; and an intermediate insulation layer 6b made of, for example, ceramic laminated on the metal substrate 4 or the lower insulation layer 6a and having a rectangular recess 5 for accommodating a chip, such as, a semiconductor chip. Input/output conductive patterns 7 made of, for example, metallized layers, are formed on the intermediate insulation layer 6b. Laminated on this intermediate layer 6b is an upper insulation layer 6c made of, for example ceramic and provided with metallized seal layer 8 covered with a seal cap (not shown) so as to partially cover the conductive patterns 7 on the intermediate layer 6b. The packages shown in these drawings have multi-layer construction, as mentioned above.
Recently, however, a semiconductor chip of ultra-high frequency which operates in a range of ultra-high frequency, i.e., more than 10 GHz, has been developed. For this sake, a package becomes necessary to accommodate therein a highly integrated chip. Under these situations, the pitch of the conductive patterns 7 formed on the intermediate insulation layer 6b and under the upper insulation layer 6c, i.e., the pattern pitch of the inner lead portion 7a of the package 1, shown in FIG. 24, must necessarily be minimized to conform to the pitch of the connecting patterns of the chip which is to be mounted on the metal substrate 4a or the lower insulation layer 6a.
In this known package 1, the width C of the conductive patterns 7, made of metallized layer, formed on the upper surface of the intermediate insulation layer 6b located outside the upper insulation layer 6c, i.e., the outer leads 7b shown in FIG. 24, must necessarily be enough in such a manner that the lead lines 9 can be easily connected to the outer lead portions 7b. Also, if a semiconductor chip of ultra-high actuating frequency is to be accommodated in the above-mentioned known package 1, the widths A and C of the inner and outer lead portions 7a and 7b must necessarily be the same to each other, as shown in FIG. 24, so as to match the characteristic impedance of the conductive patterns 7. For this purpose, if a highly integrated semiconductor chip of ultra-high actuating frequency was accommodated in the known package 1, the gap remaining between the adjacent inner leads 7a would be very small. This results in a problem that the insulation performance between the adjacent inner leads 7a would be reduced so that cross-talk between the adjacent inner leads 7a would be increased.
In a known package 1 as mentioned above, some proposals have been made. For example, the pattern width A of the inner lead portion 7a is formed smaller than the pattern width C of the outer lead portion 7b so as to conform to the width of the connecting pattern of the chip which is to be accommodated in the package, while matching the characteristic impedance of the conductive patterns 7 comprising inner and outer leads 7a and 7b, by locally changing the thickness of the insulative layer just below the inner leads 7a, or using insulative material having different permittivity at positions just below the inner leads 7a.
However, this solution is inappropriate and not practical, since if a package were manufactured as mentioned above, the mechanical strength of the package 1 would be reduced so that the package would easily be bent or curved and it would be far more difficult to manufacture such a package.